Input-Series–Output-Parallel-Connected Buck Rectifiers for High-Voltage Applications

 

ABSTRACT

This project presents input-series–output parallel (ISOP) configuration for single-phase front-end buck rectifiers (BRs). The configuration is especially suitable for traction applications, where the complete rectification system needs to withstand high ac voltages and supply medium-power loads. The primary rectification module of the proposed configuration is based on pulse width-modulated BR (current source inverter topology). The desired isolation, mandatory for ISOP connection, is provided at the dc stage through a medium frequency/ high-frequency transformer. Equal power sharing by modules is achieved from the ac side through input voltage and current sharing. The proposed control scheme is configured using two loops. While the outer loop regulates the output dc voltage and active wave shaping of the source current, the inner loop ensures stable voltage sharing.

 

 

 

CIRCUIT DIAGRAM:

 

EXISTING SYSTEM:

Topological constraints of the VSI modules dictate that the ac voltage shared by each module is lesser than the dc link voltage. Hence, the number of modules required for the traction drive is solely decided by the dc link voltage. This imposes a limit on the minimum number of modules that are required to be connected in series to withstand the catenary voltage. Considering

this constraint, current source inverter (CSI) topologies, which offer the inherent advantage of reduced dc voltage, may offer a viable solution. However, their suitability for traction application has not received attention in the available literature.

 

 

PROPOSED SYSTEM:

          Considering the modular structure of the ISOP configuration and the advantage offered by CSI or buck-rectifier (BR) topologies in terms of reduced dc voltage, an ISOP configuration for BR modules is proposed in this paper. Owing to the reduced size of magnetics, dc–dc isolation stage is used.

The major focus of this project is to investigate the stability of ISOP configured BR modules; hence, resistive load is used to verify the system stability. The proposed control scheme is based on equal ac voltage sharing (AVS) and ac current sharing (ACS). The two-loop control scheme consists of an outer loop, which ensures stable output dc voltage and high-quality near unity power factor (UPF) source current, and an inner loop, which ensures active power sharing through reactive power control of each module.

 

 

 

TOOLS AND SOFTWARE USED:

• MP LAB
• ORCAD/PSPICE
• MATLAB/SIMULINK

 

 

OUTPUT:

• HARDWARE
• SIMULATION

REFERENCE:

Poonam Chaudhary, Suvendu Samanta, and Parthasarathi Sensarma, Member, IEEE, “Input-Series–Output-Parallel-Connected Buck Rectifiers for High-Voltage Applications”, IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 62, NO. 1, JANUARY 2015.