by admin | Jul 2, 2016 | vlsi 2016
A High-Speed FPGA Implementation of an RSD-Based ECC Processor Abstract: In this paper, an exportable application-specific instruction-set elliptic curve cryptography processor based on redundant signed digit representation is proposed. The processor employs extensive...
by admin | Jul 2, 2016 | vlsi 2016
A 0.52/1 V Fast Lock-in ADPLL for Supporting Dynamic Voltage and Frequency Scaling Abstract: In energy-efficient processing platforms, such as wearable sensors and implantable medical devices, dynamic voltage and frequency scaling allows optimizing the energy...
by admin | Jul 2, 2016 | vlsi 2016
High-Speed and Energy-Efficient Carry Skip Adder Operating Under a Wide Range of Supply Voltage Levels Abstract: In this paper, we present a carry skip adder (CSKA) structure that has a higher speed yet lower energy consumption compared with the conventional one. The...
by admin | Jul 2, 2016 | vlsi 2016
A Dynamically Reconfigurable Multi-ASIP Architecture for Multistandard and Multimode Turbo Decoding Abstract: The multiplication of wireless communication standards is introducing the need of flexible and reconfigurable multistandard baseband receivers. In this...
by admin | Jul 2, 2016 | vlsi 2016
Design and Implementation of High-Speed All-Pass Transformation-Based Variable Digital Filters by Breaking the Dependence of Operating Frequency on Filter Order Abstract: All-pass transformation (APT)-based variable digital filters (VDFs), also known as frequency...
by admin | Jul 2, 2016 | vlsi 2016
A Mixed-Decimation MDF Architecture for Radix-2K Parallel FFT Abstract: This paper presents a mixed-decimation multipath delay feedback (M 2 DF) approach for the radix-2k fast Fourier transform. We employ the principle of folding transformation to derive the proposed...
