by admin | Jul 2, 2016 | Ieee 2016
Code Compression for Embedded Systems Using Separated Dictionaries Abstract: Engineers must consider performance, power consumption, and cost when designing embedded digital systems; furthermore, memory is a key factor in such systems. Code compression is a technique...
by admin | Jul 2, 2016 | Ieee 2016
Algorithm and Architecture of Configurable Joint Detection and Decoding for MIMO Wireless Communications with Convolution Codes Abstract: This paper presents an algorithm and a VLSI architecture of a configurable joint detection and decoding (CJDD) scheme for...
by admin | Jul 2, 2016 | Ieee 2016
A High-Performance FIR Filter Architecture for Fixed and Reconfigurable Applications Abstract: Transpose form finite-impulse response (FIR) filters are inherently pipelined and support multiple constant multiplications (MCM) technique that results in significant...
by admin | Jul 2, 2016 | Ieee 2016
The VLSI Architecture of a Highly Efficient Deblocking Filter for HEVC Systems Abstract: This paper presents the VLSI architecture and hardware implementation of a highly efficient Deblocking Filter for High Efficiency Video Coding (HEVC) systems. In order to reduce...
by admin | Jul 2, 2016 | Ieee 2016
Source Code Error Detection in High-Level Synthesis Functional Verification Abstract: A dynamic functional verification method that compares untimed simulations versus timed simulations for synthesizable [high-level synthesis (HLS)] behavioral descriptions (ANSI-C) is...
by admin | Jul 2, 2016 | Ieee 2016
In-Field Test for Permanent Faults in FIFO Buffers of NoC RoutersAbstract: This paper proposes an on-line transparent test technique for detection of latent hard faults which develop in first input first output buffers of routers during field operation of NoC. The...