RF Power Gating: A Low-Power Technique for Adaptive Radios
In this paper, we propose a low-power technique, called RF power gating, which consists in varying the active time ratio (ATR) of the RF front end at a symbol time scale. This technique is especially well suited to adapt the power consumption of the receiver to the performance needs without changing its architecture. The effect of this technique on the bit error rate (BER) performances is studied for a basic estimator in the specific case of minimum-shift keying signaling. A system-level energy model is also derived and discussed to estimate precisely the power reduction based on the characteristics and the power consumption of each block. This model allows highlighting the different contributors of the power reduction. The BER results and the energy model are finally merged to determine the best ATR meeting the design constraints. Applying this technique to the IEEE 802.15.4 standard, this paper shows that an ATR of 20% is a good tradeoff to meet the packet error rate constraint while maximizing the energy reduction ratio. Using typical block power consumptions, an energy reduction ratio around 20% can be reached. Even better energy reduction ratios (∼60%) are also achievable when most of the blocks are power-gated. The proposed architecture of this paper analysis the logic size, area and power consumption using Xilinx 14.2.
Enhancement of the project:
Some techniques have been proposed toward the reduction of the RX power consumption, the main solution proposed by adaptive radios is to leverage the emitted power of the transmitter (TX) to adapt the TX/RX system to the quality of the communication channel and save a substantial amount of power at the TX level. However, saving power at the RX level is of major concern for some wireless sensor network or Internet of Things applications.